[SYCL] Sub-group load/store for raw pointers #3255
Merged
Conversation
This file contains hidden or bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
|
/summary:run |
Pennycook
requested changes
Feb 24, 2021
vladimirlaz
changed the title
- remove unnecessary attributes for SPIR-V declaration and definitions; - fix SPIR-V enumeration values; - add tests; - generate assert if load/store is called for private pointer; - remove decoreded reference code; - use spir64-unknown-unknown-sycldevice target in LIT infra to use device side asserts; - update documentation.
- implement fallback for CUDA BE; - fix assert function name on Windows.
Pennycook
previously approved these changes
Feb 26, 2021
sycl/doc/extensions/SubGroupAlgorithms/SYCL_INTEL_sub_group_algorithms.asciidoc
Outdated
Show resolved
Hide resolved
sycl/doc/extensions/SubGroupAlgorithms/SYCL_INTEL_sub_group_algorithms.asciidoc
Outdated
Show resolved
Hide resolved
Pennycook
previously approved these changes
Mar 1, 2021
|
@intel/dpcpp-specification-reviewers, @againull could you please have a look? |
againull
previously approved these changes
Mar 5, 2021
bader
requested changes
Mar 7, 2021
Pennycook
previously approved these changes
Mar 8, 2021
|
@vladimirlaz, please, fix LIT test failure. |
|
bader
requested changes
Mar 9, 2021
bader
approved these changes
Mar 9, 2021
Pennycook
approved these changes
Mar 10, 2021
vladimirlaz
added a commit
to vladimirlaz/llvm-test-suite
that referenced
this pull request
Mar 15, 2021
alexbatashev
pushed a commit
to alexbatashev/llvm
that referenced
this pull request
Mar 15, 2021
* upstream/sycl: Add ITT stubs and wrappers for SPIR-V devices (intel#3279) [SYCL] Add zero argument version of buffer::reinterpret() for SYCL 2020 (intel#3333) [SYCL] Restore old behavior of get() method (intel#3356) [Driver][SYCL][FPGA] Improve FPGA AOT when using Triple (intel#3330) [SYCL] Revert support for pinned_host_memory extension in Level-Zero backend. Make it a NOP (intel#3349) [SYCL] Remove redundant build options processing (intel#3342) [SYCL][NFC] Factor out GenXIntrinsics git repo tag. (intel#3351) [SYCL] Add coarse-grained debug aid for finding imbalance in Level-Zero alloc/free (intel#3334) [SYCL] Sub-group load/store for raw pointers (intel#3255) [SYCL] Fix more unused variables warnings (intel#3352) [BuildBot] Uplift CPU/FPGAEMU RT version for CI Process (intel#3338)
vladimirlaz
added a commit
to intel/llvm-test-suite
that referenced
this pull request
Mar 15, 2021
* [SYCL] Moved tests introduced in intel/llvm#3255 * [SYCL] Fix issues found in CI - fix target tripple used by default to spir64-unknown-unknown-sycldevice; - remove obsolet LIT parameters (target_triple, host_triple); - enable tests for CPU and ACC devices.
aelovikov-intel
pushed a commit
to aelovikov-intel/llvm
that referenced
this pull request
Feb 23, 2023
* [SYCL] Moved tests introduced in intel#3255 * [SYCL] Fix issues found in CI - fix target tripple used by default to spir64-unknown-unknown-sycldevice; - remove obsolet LIT parameters (target_triple, host_triple); - enable tests for CPU and ACC devices.
aelovikov-intel
pushed a commit
to aelovikov-intel/llvm
that referenced
this pull request
Mar 27, 2023
* [SYCL] Moved tests introduced in intel#3255 * [SYCL] Fix issues found in CI - fix target tripple used by default to spir64-unknown-unknown-sycldevice; - remove obsolet LIT parameters (target_triple, host_triple); - enable tests for CPU and ACC devices.
vmaksimo
pushed a commit
that referenced
this pull request
Jul 29, 2025
The source element type used in a GEP may differ from the actual type of the pointer operand (e.g., ptr i8 vs. ptr [N x T]). This mismatch can lead to incorrect address computations during translation to SPIR-V of GEP used in constexpr context, which requires that pointer types match the type of the object being accessed. This patch inserts an explicit bitcast to convert the GEP pointer operand to the expected type, derived from the GEP’s source element type, before emitting an PtrAccessChain. This ensures the resulting SPIR-V instruction has a correctly typed base pointer and produces valid indexing behavior. For example: Before this change, the following GEP was translated incorrectly: getelementptr(i8, ptr addrspace(1) @a_var, i64 2) Whereas this nearly equivalent GEP was handled correctly: getelementptr inbounds ([2 x i8], ptr @a_var, i64 0, i64 1) Previously, the first form was incorrectly interpreted as: getelementptr inbounds ([2 x i8], ptr @a_var, i64 0, i64 2) Original commit: KhronosGroup/SPIRV-LLVM-Translator@1be936678fd8bbe
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
Add this suggestion to a batch that can be applied as a single commit.
This suggestion is invalid because no changes were made to the code.
Suggestions cannot be applied while the pull request is closed.
Suggestions cannot be applied while viewing a subset of changes.
Only one suggestion per line can be applied in a batch.
Add this suggestion to a batch that can be applied as a single commit.
Applying suggestions on deleted lines is not supported.
You must change the existing code in this line in order to create a valid suggestion.
Outdated suggestions cannot be applied.
This suggestion has been applied or marked resolved.
Suggestions cannot be applied from pending reviews.
Suggestions cannot be applied on multi-line comments.
Suggestions cannot be applied while the pull request is queued to merge.
Suggestion cannot be applied right now. Please check back later.
Add sub-group load/store methods for raw pointers:
Also fixed target triple (spir64-unknown-unknown-sycldevice) used for SPIR-V compilation path in LIT tests. The previous one was not supported by device library.